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Cirrus Logic, Inc. - CS8900A
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10Base-T Embedded Ethernet Controller

Series: Crystal LAN®

Model: CS8900A

  • Single-chip IEEE 802.3 Ethernet solution
  • Comprehensive suite of software drivers available
  • Efficient PacketPage™ architecture operates in I/O and memory space and as DMA slave
  • Full-duplex operation
  • On-chip RAM buffers transmit and receive frames
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CS8900A is a low-cost Ethernet LAN controller for embedded applications. Its highly integrated design eliminates the need for costly external components required by other Ethernet controllers. The CS8900A includes on-chip RAM, 10Base-T transmit-and-receive filters and a direct ISA-Bus interface with 24 mA drivers.

In addition to high integration, the CS8900A offers a broad range of performance features and configuration options. Its unique PacketPage architecture automatically adapts to changing network traffic patterns and available system resources. The result is increased system efficiency.

The CS8900A is available in a 100-pin TQFP package, ideally suited for small form-factor, cost-sensitive Ethernet applications. With the CS8900A, system engineers can design a complete Ethernet circuit that occupies less than 1.5 square inches (10 sq. cm.) of board space.

  • Single-chip IEEE 802.3 Ethernet solution
  • Comprehensive suite of software drivers available
  • Efficient PacketPage™ architecture operates in I/O and memory space and as DMA slave
  • Full-duplex operation
  • On-chip RAM buffers transmit and receive frames
  • 10Base-T port and filters (polarity detection/correction)
  • AUI port for 10Base-2, 10Base-5 and 10Base-F
  • Automatic re-transmission on collision, padding and CRC (cyclical redundancy check)
  • EEPROM support for jumperless configuration
  • Boot PROM support for diskless systems
  • Boundary scan and loopback test
  • LED drivers for link status and LAN activity
  • Standby and suspend sleep modes
  • 3 V or 5 V operation; commercial or industrial temperature range
  • Package: 100-pin TQFP; lead-free assembly
  • Stream transfer for reduced CPU overhead
  • Auto-switch between DMA and on-chip memory
  • Early interrupts for frame pre-processing
  • Automatic rejection of erroneous packets
 
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